A defect is any non-conformance of an item to specified requirements. Defects are potential causes of performance degradations and failures during the life cycle of a product. Variations in facilities, procedures and workmanships are common sources of defects in electronic systems.
Some defects manifest themselves in the intermediate and final inspections and electrical tests of the products without additional stress exposure. However, there are other defects that can only be detected either by intrusive inspections that are generally not conducted during the manufacturing processes, or by means of converting the defect into a failure through application of stress.
Environmental Stress Screen (ESS) and Highly Accelerated Stress Screen (HASS) are developed to eliminate defects due to manufacturing variations that cannot be detected using non-destructive means. Conventional stresses used in ESS and HASS (thermal shock and random vibration), although proven to be effective for uncovering generic defects in electronic systems, it works like a black-box without considering factors such as potential field environment of a product, and the physics between different defects and stresses. This results in many reported cases of ineffective or even counterproductive ESS and HASS in the field. Therefore, it is important to understand the relationship between different defects and stresses so that stresses in these processes can be selected based on the defects of concern in the field environment.
In this webpage, abilities of selected stresses to precipitate undetectable defects into detectable modes are presented. The focus is put on board level defects, while some component level defects that can be detected at a board level monitoring system are included. We categorize these defects by their locations (e.g., solder joint, connectors). For each location, common defect types are listed and the ability of each stress in uncovering specific defects are categorized into 3 levels: 1) the defect is likely to be uncovered by this stress, 2) the defect can be uncovered by this stress under specific conditions, 3) the defect is unlikely to be uncovered by this stress, they are represented by the symbols ✔, ✇ and ✖ respectively.
Detailed information on each defects and stresses is provided on separate pages. For defects, it includes Defect Descriptions, graphical representations, defect formation process(es), etc. For stresses, it includes stress test descriptions, related standards, example stress profiles, etc. With this information, we aim to provide 1) a collective knowledge-based guide for stress screening implementation as a bottom up approach to eliminate defect type(s) of concern, 2) insights for corrective actions to be taken in eliminating manufacturing variations.
For any questions or concerns, please contact Jennifa Li or Dr. Diganta Das.