Defect Description
Warpage is the out-of-plane deformation of an artifact (printed wiring board) caused by non-homogenous shrinkage or expansion of elements composing the artifact [1].
Defect Formation Process(s)
During fabrication, solder masking and reflow soldering process, residual stresses caused by coefficient of thermal expansion (CTE) mismatch between different board materials combined with thermo-mechanical effects can result in board warpage [2-3].
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List of Tests to Precipitate this Defect |
Failure Acceleration |
Likelihood to Precipitate this Defect (condition) |
Failure Mechanism(s) |
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Thermal Shock |
• Thermal shock overstresses of weak solder joints resulting from automated component placement or insertion on a warped board [3] • Cyclic thermal mechanical stress causes fatigue cracking of solder joints due to deflections of board over temperature swings [4]. |
✔ |
Mechanical fatigue/ overstress |
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Combined Environment |
• Same as Thermal Shock |
✔ |
References
[1] D. Zwemer et al., "PWB warpage analysis and verification using an AP210 standards-based engineering framework and shadow moire," Proceedings of the 5th International Conference on Thermal and Mechanical Simulation and Experiments in Microelectronics and Microsystems, pp.121-131, 2004.
[3] W. Sutherlin, Y. Polsky and I. C. Ume, "A relative comparison of PWB warpage due to simulated infrared and wave soldering processes," 48th Electronic Components & Technology Conference, Seattle, WA, pp. 807-815, 1998
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