Stress Test Background
Hot Step Stress is one of the conventional stresses, following the Cold Step Stress sequentially, being used in HALT for defect precipitation for the purpose of design margins improvement.
Similar to Cold Step Stress, the stress profile example shown in Figure 1 at the bottom resembles the test descriptions in IPC 9592A, IEST-RP-PR-003.1, and GMW 3172 for HALT. Therefore, apart from the ability in precipitating defects with the stress, detecting failures with functional tests, relationship between types of failures and discrete stress levels is also addressed in the profile design for proper corrective actions be made for the improvement in design margins.
Stress Profile Description
Typically starts at room temperature, or slightly higher. Then step up by fixed increments to the maximum temperature (Tmax) with sufficient dwell time at each step. Maximized functional test coverage should be optimized during testing.
Parameters Determination
Step size
Based upon the accuracy required for failure point definition and the time available for testing. Reduce step size as failure point is reached is appropriate, which allows a fine definition without compromising test duration.
Dwell time
Should be determined by stabilization time of the unit, different thermal stability criteria should be used for different purposes. It should also be long enough to cover functional testing duration.
For design improvement purposes (HALT), more stringent thermal stability criteria (entire unit should reach target temperature) is more appropriate so that defects at unexpected locations can be uncovered.
For screening purposes (HASS, ESS), less stringent thermal stability criteria (locations of interest should reach target temperature) may be preferred so that expected defects can be precipitated over a shorter span of time and without life of other parts/ locations being over-consumed by the long stabilization time.
Target stress level in this case, Tmax
Should be determined based on the purpose of defect precipitation.
For design improvement purposes (HALT), stress levels to be high enough to precipitate defects that can cause failures below the desired stress limits or before the desired lifetime.
For screening purposes (HASS, ESS), target stress levels should be set lower to allow for sufficient remaining lifetime of the population with less critical defects remain in the products.
Standards with Stress Test Description
For Design Improvement Purpose
- IPC 9592A: Requirements for Power Conversion Devices for the Computer and Telecommunications Industries
- IEST RP PR 003.1: HALT and HASS
- GMW 3172: Highly Accelerated Life Testing (HALT) Highly Accelerated Stress Screening and Auditing
For Testing/ Acceptance Purpose
Potential Defects Precipitated by this Stress
Defect Location |
Potential Defects |
Failure Mechanism(s) |
Solder Joints |
Corroded Solder |
Mechanical Overstress |
Board Layers |
Hollow Fiber |
Conductive Filament Formation |
Separation of Fiber/ Resin |
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Metallizations |
Reduced Surface Trace Spacing |
Electrochemical Migration |
Migration Path between Surface Traces |
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Passive Parts |
Parameter Drift |
Vaporization of Electrolyte of Electrolytic Capacitors (Example) |
Integrated Circuits |
Intermittent |
N/A |
Miscellaneous |
Software Faults |
N/A |
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