Testing Method to Identify Counterfeit Field-Programmable Gate Arrays (FPGAs)

Join the CALCE/SMTA Counterfeit Parts and Materials Symposium 2022 for this and other informative presentations

Stephen Saddow

Global ETS and University of South Florida

Abstract: In early 2016 to 2017 Xilinx introduced a 2D board code marking on all 28nm, 20nm and 16nm FPGAs and MPSoCs. The 2D bar code was an industry trend to improve device level tracking and improve product traceability to maintain tighter device manufacturer control. Unique to each device 2D bar code was the part’s manufacturing genealogy information including device lot, date code, speed, temperature grade and SCD information. This was added to all 7 Series, UltrScale, UltraScale+, Zynq-7000 and Zynq UltraScale+ parts. With the new 2D bar code marking, all critical device information was no longer marked on the device. More importantly approval from Xilinx was required to use their 2D bar code scanning app or login to upload a 2D image. Recently Xilinx took the ability to scan the 2D bar code away from independent suppliers and/or third-party test laboratories. As a result, the device lot, date code, speed and temperature grade cannot be independently confirmed. This is a significant problem since suppliers and end users do not know what part they have/purchased, especially when manufacturer traceability is not available. In this paper, we will discuss several counterfeit methods including traditional methods, surface micro-blasting, package Recap, and testing methods to identify counterfeit FPGAs. The overall process flow of our approach is as follows:

1) Low power visual inspection – detection of package tampering and pin re-working,

2) Scanning Acoustic Microscopy – easy means to detect if lid has been removed/replaced after sale,

3) JTAG and Boundary Scan – rapid means to measure parametric performance and detect functional anomalies, and

4) Speed and grade verification – accomplished using gate delay simulation and measurement.

All of the assessment methods to be reported use the AI/ML methods outlined at the previous SMTA conference. Thus, rapid assessment of part authenticity, and expansion of the part data base to further improve measurement accuracy and relevance, are possible. In this paper we will outline our comprehensive method to determine not only FPGA authenticity but to confirm speed-grade so that the end-user will be able to integrate these parts with the highest level of confidence possible.

Bio: Experienced Professor with a demonstrated history of working in higher education. Skilled in Silicon Carbide Materials and Device Fabrication. Currently working at the nexus of Material Science and Biomedical Engineering to develop innovative solutions for the healthcare industry. Strong educational background with a Doctor of Philosophy (PhD) focused in Electrical Engineering from the University of Maryland College Park and numerous visiting Scientist/Professor stages in Europe and Brasil. Senior member of the IEEE, National Academy of Inventors and Fellow of the AIMBE.