A Novel Anti-Counterfeiting Technology for Semiconductor Supply Chains Using Inkjet-Printed Silicon Nanoparticle Ink

Tadatomo Yamada [Lintec Corporation]

Abstract: 

Counterfeit electronic parts pose serious risks to the reliability and security of semiconductor supply chains, especially in high-reliability applications such as aerospace, defense, and automotive systems, where authenticity is critical. The increasing complexity and global nature of semiconductor supply chains make it more difficult to prevent counterfeit parts, creating a strong need for reliable and scalable authentication methods. Conventional printed identification methods, such as laser marking and QR codes, rely on visible information and require relatively large marking areas. In addition, they can be easily copied or modified, which limits their effectiveness.
This paper presents a novel anti-counterfeiting technology based on structural color nanoparticles. The evaluation process flow is as follows. First, a backside protection material, originally developed by the authors, is laminated onto a silicon wafer. Micro-scale dots are then formed on the protection layer using inkjet printing. The dots have a diameter of approximately 50 μm and a thickness of less than 1 μm. Finally, the ink and the backside protection material are thermally cured together at 140 °C for 2 hours. Each dot shows a unique optical emission pattern caused by the shape and distribution of the nanoparticles, making it difficult to counterfeit. For verification, the printed dots are captured using an automated imaging system, and the acquired images are analysed. Even in automatically captured images, bright spots from individual silicon nanoparticles can be observed. The results confirm that more than one million unique patterns can be distinguished, demonstrating high identification capability.
These results indicate that the proposed technology is an effective solution for anti-counterfeiting in semiconductor supply chains, offering both ultra small marking size and strong resistance to counterfeiting.

Biography: 

Tadatomo Yamada received his B.E. from Yokohama National University, Japan, in 2009. After graduation, he joined the Business Planning Department at LINTEC Corporation. He currently serves as a Project Manager and has been engaged in the development of advanced materials and processes for semiconductor fabrication.
He has presented numerous papers at international semiconductor conferences organized by IEEE. In 2023, he received the Highly Commended Paper Award at The 24th European Microelectronics Conference & Packaging Conference (EMPC). Since 2024, he has been serving as a committee member of IEEE CMPT Symposium Japan (ICSJ), a professional organization focused on electronics packaging technologies. He has also filed numerous patents related to semiconductor materials and equipment.

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