A Telemetry-Guided DDR/GDDR Integration Testing and Data-Driven Diagnosis Framework for AIOriented Memory Systems

Steven Chung [Global Electronic Test Services, USA ]

Abstract: 

AI-oriented platforms increasingly stress DDR5 and GDDR6 memory subsystems under high concurrency, bursty access patterns, and temperature-dependent drift. In this regime, conventional pattern-based pass/fail testing often fails to (i) reflect AI-like access behavior, (ii) provide sufficient observability for root-cause isolation, and (iii) reproducibly expose marginal or intermittent failure modes that manifest as tail-latency outliers or sporadic errors in the field. These limitations are amplified in practical manufacturing, repair, and rework flows where device quality can be heterogeneous, especially when incorporating salvaged (harvested) DRAM devices with unknown usage and thermal history.
This presentation presents a unified framework that bridges integration testing, failure signature diagnosis, and incoming quality screening (IQS) for both DDR5 and GDDR6 devices, targeting actionable deployment in production test and incoming inspection workflows

Biography: 

Steven Chung

Dr. Diganta Das

For more information or questions regarding the technical program (including Professional Development Courses), contact the Conference Chair, Dr. Diganta Das

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