A Telemetry-Guided DDR/GDDR Integration Testing and Data-Driven Diagnosis

Xu Cong [Global Electronic Test Services, USA ]

Abstract: 

AI-oriented platforms increasingly stress DDR5 and GDDR6 memory subsystems under high concurrency, bursty access patterns, and temperature-dependent drift. In this regime, conventional pattern-based pass/fail testing often fails to (i) reflect AI-like access behavior, (ii) provide sufficient observability for root-cause isolation, and (iii) reproducibly expose marginal or intermittent failure modes that manifest as tail-latency outliers or sporadic errors in the field. These limitations are amplified in practical manufacturing, repair, and rework flows where device quality can be heterogeneous, especially when incorporating salvaged (harvested) DRAM devices with unknown usage and thermal history.
This presentation presents a unified framework that bridges integration testing, failure signature diagnosis, and incoming quality screening (IQS) for both DDR5 and GDDR6 devices, targeting actionable deployment in production test and incoming inspection workflows

Biography: 

Xu Cong is a Ph.D. candidate in Electrical Engineering at the University of South Florida and is affiliated with Global ETS. His work focuses on digital signal processing, hybrid artificial intelligence, embedded systems, semiconductor testing, and hardware-software co-designed intelligent systems. His research spans AI-assisted signal processing, digital twin technologies, multi-source localization, and intelligent transportation applications. In his recent presentation, he introduces a telemetry-guided DDR/GDDR testing and screening framework for AI-oriented memory systems, integrating FPGA-based stress generation, structured telemetry, digital-twin thermal modeling, PRBS error detection, and graded screening methods to improve memory reliability evaluation under AI workload conditions. He has also contributed to industrial semiconductor testing, automated chip validation, and data-driven diagnostic platforms that connect academic research with practical engineering deployment.

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